| Delay Range |
25nS to 500 nS ± 5% or
±2nS, whichever is greater |
| Tap to Tap Tolerances |
±10% of delay between taps or
±1nS, whichever is greater |
| Rise Time |
4nS Maximum |
| Supply Voltage (Vcc) |
5.0V ±5% |
| Supply Current |
60mA (Typical) with 10 TTL
loads |
| Logic 0 Input Current |
2mA Maximum |
| Logic 1 Input Current |
50uA Maximum |
| Logic 0 Voltage Out |
0.4V Maximum |
| Logic 1 Voltage Out |
2.4V Minimum |
| Fan out Capabilities |
10 TTL loads/tap Max. or 20 TTL
loads/Delay Network Max |
| Operating Temperatures |
-55 °C to +125
°C |
| Humidity |
Conforms with BS.2011, Class
H2 |
| Vibration |
Conforms with MIL.STD.202, Method
204 |
| Solderability |
Connecting pins solderable to
BS.2011:2T |
| Encapsulation |
Flame Retardant Epoxy Resin |
| |
|
| Input Test Conditions |
|
| Vcc |
5.0V |
| Supply Current |
60mA |
| Pulse Voltage |
3.2V |
| Pulse Width |
50% of Total Delay Minimum |
| Rise Time |
2nS |
| Temperature |
25°C ±20% |
| Loadings |
2 TTL loads/tap (10 total) |
